| Capital Ancillary Current Router I | 15.4 | 77 | 500.0% | 89,310,000.00 | 89,350,000.00 | 86,600,000.00 | -3.1% | 1,333,219,883.34 |
| Capital Capacitor Control Circuit II | 3.5 | 10 | 285.7% | 322,000,000.00 | 322,040,000.00 | 293,900,000.00 | -8.7% | 1,037,656,666.67 |
| Capital Ancillary Current Router II | 0.9 | 19 | 2,111.1% | 825,000,000.00 | 825,040,000.00 | 974,600,000.00 | 18.1% | 915,016,666.67 |
| Capital Command Processor I | 6.3 | 8 | 127.0% | 27,700,000.00 | 27,740,000.00 | 91,150,000.00 | 228.6% | 588,494,666.67 |
| Capital Semiconductor Memory Cell I
| 5.8 | 34 | 586.2% | 59,810,000.00 | 59,850,000.00 | 45,460,000.00 | -24.0% | 266,366,333.33 |
| Capital Capacitor Control Circuit I | 4.0 | 19 | 475.0% | 18,520,000.00 | 18,560,000.00 | 20,000,000.00 | 7.8% | 79,860,666.67 |
| Capital Processor Overclocking Unit I | 2.6 | 3 | 115.4% | 9,806,000.00 | 9,846,000.00 | 29,970,000.00 | 204.4% | 76,972,000.00 |
| Capital Processor Overclocking Unit II
| 0.2 | 3 | 1,500.0% | 169,600,000.00 | 169,640,000.00 | 89,990,000.00 | -47.0% | 25,666,666.67 |
| Capital Egress Port Maximizer I | None | 2 | 10,000.0% | 0.00 | 0.00 | 65,000,000.00 | 0.0% | 0.00 |
| Capital Egress Port Maximizer II | None | 0 | 10,000.0% | 29,890,000.00 | 29,930,000.00 | 0.00 | 0.0% | 0.00 |
| Capital Powergrid Subroutine Maximizer I | None | 0 | 10,000.0% | 69,300,000.00 | 69,340,000.00 | 0.00 | 0.0% | 0.00 |
| Capital Powergrid Subroutine Maximizer II | None | 5 | 10,000.0% | 28,760,000.00 | 28,800,000.00 | 50,000,000.00 | 73.6% | 0.00 |
| Capital Semiconductor Memory Cell II | None | 0 | 10,000.0% | 742,600,000.00 | 742,640,000.00 | 0.00 | 0.0% | 0.00 |
| Capital Liquid Cooled Electronics I | None | 0 | 10,000.0% | 14,010,000.00 | 14,050,000.00 | 0.00 | 0.0% | 0.00 |
| Capital Liquid Cooled Electronics II | None | 2 | 10,000.0% | 23,260,000.00 | 23,300,000.00 | 42,600,000.00 | 82.8% | 0.00 |