| Capital Capacitor Control Circuit II | 0.5 | 6 | 1,200.0% | 211,400,000.00 | 211,440,000.00 | 279,800,000.00 | 32.3% | 132,766,666.67 |
| Capital Semiconductor Memory Cell I | 1.9 | 4 | 210.5% | 35,350,000.00 | 35,390,000.00 | 58,770,000.00 | 66.1% | 109,720,333.33 |
| Capital Ancillary Current Router I | 0.9 | 4 | 444.4% | 71,430,000.00 | 71,470,000.00 | 100,900,000.00 | 41.2% | 101,406,666.67 |
| Capital Capacitor Control Circuit I | 1.9 | 4 | 210.5% | 5,041,000.00 | 5,081,000.00 | 26,340,000.00 | 418.4% | 49,165,666.67 |
| Capital Command Processor I | 0.2 | 0 | 0.0% | 20,000,000.00 | 20,040,000.00 | 0.00 | 0.0% | 6,066,666.67 |
| Capital Processor Overclocking Unit I | None | 19 | 10,000.0% | 0.00 | 0.00 | 11,510,000.00 | 0.0% | 0.00 |
| Capital Processor Overclocking Unit II | None | 1 | 10,000.0% | 42,840,000.00 | 42,880,000.00 | 121,000,000.00 | 182.2% | 0.00 |
| Capital Liquid Cooled Electronics I | None | 0 | 0.0% | 26,330.00 | 66,330.00 | 0.00 | 0.0% | 0.00 |
| Capital Liquid Cooled Electronics II | None | 1 | 10,000.0% | 50,000.00 | 90,000.00 | 37,000,000.00 | 0.0% | 0.00 |
| Capital Ancillary Current Router II | None | 10 | 10,000.0% | 548,400,000.00 | 548,440,000.00 | 927,000,000.00 | 69.0% | 0.00 |
| Capital Egress Port Maximizer I | None | 0 | 0.0% | 0.00 | 0.00 | 0.00 | 0.0% | 0.00 |
| Capital Egress Port Maximizer II | None | 0 | 0.0% | 7,000,000.00 | 7,040,000.00 | 0.00 | 0.0% | 0.00 |
| Capital Powergrid Subroutine Maximizer I | None | 0 | 0.0% | 78,130.00 | 118,130.00 | 0.00 | 0.0% | 0.00 |
| Capital Powergrid Subroutine Maximizer II | None | 0 | 0.0% | 11,140,000.00 | 11,180,000.00 | 0.00 | 0.0% | 0.00 |
| Capital Semiconductor Memory Cell II | None | 5 | 10,000.0% | 385,100,000.00 | 385,140,000.00 | 449,900,000.00 | 16.8% | 0.00 |